Senior IP Design Verification Engineer – XBAR IP
A senior-level role focused on the design verification of crossbar (XBAR) interconnect IP, requiring deep expertise in hardware verification methodologies and IP-level validation.
About the role
This is a senior engineering position within the IP design verification domain, with a specific focus on crossbar (XBAR) interconnect IP. The role involves ensuring the functional correctness and robustness of complex IP blocks through rigorous verification processes.
The successful candidate is expected to bring strong hands-on experience in IP-level design verification, including the development and execution of verification plans, test benches, and coverage-driven validation strategies for high-performance interconnect IP.
Candidates should possess a solid background in hardware verification methodologies such as UVM, SystemVerilog, or equivalent frameworks, along with a thorough understanding of interconnect architectures and on-chip communication protocols.
This is a senior individual contributor role that may also involve mentoring junior engineers and collaborating closely with design, architecture, and physical implementation teams to deliver high-quality IP.