Senior IP Design Verification Engineer – XBAR IP
A senior engineering role focused on design verification of crossbar (XBAR) IP, contributing to advanced silicon development within a leading semiconductor organisation.
About the role
This is a senior-level position within the IP design verification function, with a specific focus on crossbar (XBAR) IP. The role sits at the intersection of hardware design and verification methodology, requiring deep expertise in verifying complex interconnect IP used in high-performance computing architectures.
The engineer in this role will be responsible for developing and executing verification plans, building testbenches, and ensuring the functional correctness of XBAR IP components. Close collaboration with design and architecture teams will be central to the day-to-day work.
Key areas of focus include:
- Design verification of crossbar interconnect IP
- Testbench development and verification planning
- Collaboration with cross-functional hardware engineering teams
- Ensuring quality and functional coverage of complex IP blocks
Candidates should bring substantial hands-on experience in IP-level design verification within the semiconductor industry, along with strong knowledge of industry-standard verification languages and methodologies.