Senior IP Design Verification Engineer – XBAR IP
A Senior IP Design Verification Engineer is sought to work on XBAR (crossbar) IP, contributing to the verification of high-performance interconnect designs within a leading semiconductor engineering team.
About the role
This role is focused on the design verification of XBAR (crossbar) IP, a critical interconnect component in high-performance computing and graphics architectures. The position is based in Bengaluru, Karnataka, and sits within a semiconductor engineering organisation known for pushing the boundaries of GPU and accelerated computing technology.
The successful candidate will be responsible for verifying complex IP blocks at the design level, ensuring correctness, performance, and reliability of crossbar interconnect logic before integration into larger system-on-chip designs.
Key focus areas include:
- IP-level design verification of XBAR interconnect blocks
- Development and execution of verification plans and test environments
- Collaboration with design and architecture teams to resolve issues and close verification gaps
This is a senior-level position, indicating that candidates are expected to bring substantial hands-on experience in RTL verification methodologies and IP-level verification flows within the semiconductor industry.