Senior IP Design Verification Engineer – XBAR IP
NVIDIA is seeking a Senior IP Design Verification Engineer specialising in XBAR IP to join its team in Bengaluru, Karnataka. The role focuses on verification of crossbar interconnect IP within NVIDIA's silicon design organisation.
About the role
This senior engineering position is part of NVIDIA's IP design verification team based in Bengaluru, Karnataka. The role centres on the functional verification of XBAR (crossbar) IP — a critical interconnect fabric used in NVIDIA's high-performance computing and graphics architectures.
The successful candidate will be responsible for developing and executing comprehensive verification plans, building and maintaining testbenches, and driving coverage closure for XBAR IP blocks. Close collaboration with design, architecture, and physical implementation teams will be an integral part of the day-to-day work.
Key responsibilities include:
- Designing and implementing constrained-random and directed verification environments for XBAR IP
- Developing and maintaining SystemVerilog/UVM-based testbenches
- Defining and tracking functional coverage goals to ensure thorough verification closure
- Debugging and root-causing failures across simulation and emulation platforms
- Collaborating with cross-functional teams to align on design specifications and verification strategies
This is an opportunity to work on industry-leading silicon at one of NVIDIA's key engineering centres in India, contributing directly to products that power data centres, AI workloads, and advanced graphics platforms worldwide.