Senior IP Design Verification Engineer – XBAR IP
A senior-level opportunity for an IP design verification engineer to work on XBAR (crossbar) IP development. The role focuses on verifying complex interconnect IP blocks within a high-performance silicon design environment.
About the role
This is a senior engineering position focused on the design verification of XBAR (crossbar) IP — a critical interconnect component in high-performance chip architectures. The successful candidate will be responsible for developing and executing verification strategies to ensure the functional correctness and robustness of the IP block.
The role demands deep expertise in IP-level verification methodologies, including the development of testbenches, test plans, and coverage models. The engineer will work closely with design and architecture teams to understand specifications and translate them into comprehensive verification environments.
- Domain: XBAR (Crossbar) Interconnect IP
- Level: Senior Individual Contributor
- Function: IP Design Verification
Candidates are expected to bring strong analytical skills, a thorough understanding of digital design verification flows, and the ability to drive verification closure independently on complex IP blocks.