Senior IP Design Verification Engineer – XBAR IP
A senior-level opportunity for an IP Design Verification Engineer specialising in XBAR IP, based in Bengaluru, Karnataka. The role involves rigorous verification of crossbar interconnect IP within a leading semiconductor environment.
About the role
This is a senior engineering position focused on the design verification of XBAR (crossbar) IP. The successful candidate will be responsible for ensuring the functional correctness and robustness of crossbar interconnect intellectual property, a critical component in high-performance computing and graphics architectures.
The role demands deep expertise in IP-level verification methodologies, including the development and execution of verification plans, testbenches, and coverage models. Candidates are expected to work closely with design and architecture teams to define verification strategies that meet rigorous quality and performance standards.
Key responsibilities may include:
- Developing and maintaining SystemVerilog/UVM-based verification environments for XBAR IP
- Defining and tracking functional coverage goals and closure criteria
- Collaborating with design engineers to review specifications and identify verification challenges
- Debugging and root-causing failures across simulation and emulation platforms
This position is suited to experienced verification engineers with a strong background in interconnect or on-chip network IP, who are looking to contribute to cutting-edge semiconductor development in Bengaluru.